Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applicability and numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
A typical MOS semiconductor device generally includes a gate electrode, which acts as a conductor, to which an input signal is typically applied via a gate terminal. Heavily doped source/drain regions are formed in a semiconductor substrate and are respectively connected to source and drain terminals. A channel region is formed in the semiconductor substrate beneath the gate electrode and separates the source/drain regions. The channel is typically lightly doped with a dopant type opposite that of the source/drain regions. The gate electrode is physically separated from the semiconductor substrate by a gate insulating layer, typically an oxide layer such as SiO.sub.2. The insulating layer is provided to prevent current from flowing between the gate electrode and the source/drain regions or channel region.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode, a transverse electric field is set up in the channel region. By varying the transverse electric field, it is possible to modulate the conductance of the channel region between the source/drain regions. In this manner an electric field controls the current flow through the channel region. This type of device is commonly referred to as a MOS field-effect-transistors (MOSFET).
Semiconductor devices, like the one described above, are used in large numbers to construct most modern electronic devices. In order to increase the capability of such electronic devices, it is necessary to integrate ever increasing numbers of such devices into a single silicon wafer. As the semiconductor devices are scaled down (i.e., made smaller) and in order to form a larger number of devices on a given surface area, the structure of the devices and fabrication techniques used to make such devices must be altered.
Several objectives influence MOSFET design and fabrication. First, there is a desire to reduce the dimensions of the MOSFET. Increasing the number of individual MOSFETs that can be placed onto a single silicon chip or die produces increased functionality per chip. Second, there is a continual desire to improve performance, and particularly the speed, of the MOSFET transistors. This pursuit is manifested in shorter conduction channel lengths and in efforts to obtain low contact resistivity at the MOSFET junctions. These aspects offer increased MOSFET speed and allow for a greater number of operations to be performed by the MOSFET in less time. MOSFETs are used in great quantity in computers where the push to obtain higher operation cycle speeds demands faster MOSFET performance. Lastly, there exists a constant need to minimize costly MOSFET fabrication steps.
As the feature dimensions of the MOSFET device decrease, new performance hurdles present themselves. One particular difficulty concerns electrical shorts between MOSFET devices and capacitive coupling between the closely stacked MOSFET structures. As the MOSFETs are pushed into a more dense arrangement there is a heightened tendency for stray electrical signals to pass from device to device. The stray electrical signals cause the MOSFETs to malfunction or possibly breakdown entirely.
As shown above, heightened speed and reduced dimensions may lead to MOSFET breakdown. Conventional approaches have encountered difficulty trying to maintain performance in the face of decreasing size and increasing density of devices. In attempting to overcome these hurdles, it is equally desirable to keep costly processing steps to a minimum. Therefore, it is desirable to provide a semiconductor structure and provide a process for its manufacture to address the above identified problems.